Title :
Test generation for crosstalk-induced delay in integrated circuits
Author :
Chen, Wei-Yu ; Gupta, Sandeep K. ; Breuer, Melvin A.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This paper shows how crosstalk coupling between lines can affect the propagation delay of signals in integrated circuits. A model is presented to evaluate the effect of parasitic coupling crosstalk. Conditions for the creation of the worst-case coupling and propagation of a delayed signal are presented. A test pattern generation algorithm utilizing the above conditions is presented and applied to several example circuits
Keywords :
automatic test pattern generation; crosstalk; delay estimation; fault diagnosis; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; integrated circuit testing; timing; ATPG algorithm; IC test generation; backward delay; circuit performance; clock frequency; crosstalk coupling; crosstalk-induced delay; debugging effort; dynamic timing; forward delay; integrated circuits; model; noise effects; parasitic coupling crosstalk; signal propagation delay; static timing analysis; technology scaling; test pattern generation algorithm; worst-case coupling; Circuit testing; Clocks; Coupling circuits; Crosstalk; Debugging; Frequency; Integrated circuit noise; Integrated circuit technology; Integrated circuit testing; Propagation delay;
Conference_Titel :
Test Conference, 1999. Proceedings. International
Conference_Location :
Atlantic City, NJ
Print_ISBN :
0-7803-5753-1
DOI :
10.1109/TEST.1999.805630
