DocumentCode
3329238
Title
Design of battery protection circuit
Author
Lee, Jang-Hyuck ; Sung, Joon-Youp
Author_Institution
MOS IC GROUP, KEC, Seoul, South Korea
fYear
2004
fDate
18-19 Nov. 2004
Firstpage
784
Lastpage
786
Abstract
A battery protection circuit is presented. The circuit is composed of charge/discharge control IC and power MOSFET. Simulation was performed with 0.5 μm BCD technology and the RDS(ON) of the power MOSFET is 38 mΩ. The circuit reduces loss by RDS(ON) resistance more than the previous circuit. And it improves efficiency of the battery pack. Power dissipation of the power MOSFET is about 68 mW, when the current of the MOSFET is 1.3 A.
Keywords
BIMOS integrated circuits; circuit simulation; power MOSFET; power control; power system protection; secondary cells; 0.5 micron; 1.3 A; 38 mohm; BCD technology; battery pack efficiency; battery protection circuit; charge/discharge control IC; circuit simulation; power MOSFET; Batteries; Circuit simulation; Delay effects; Lithium; MOSFET circuits; Power MOSFET; Power dissipation; Protection; Virtual manufacturing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing and Communication Systems, 2004. ISPACS 2004. Proceedings of 2004 International Symposium on
Print_ISBN
0-7803-8639-6
Type
conf
DOI
10.1109/ISPACS.2004.1439167
Filename
1439167
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