DocumentCode :
3329251
Title :
High-Throughput and Low-Power Architectures for Reed Solomon Decoder
Author :
Kumar, Akash ; Sawitzki, Sergei
fYear :
2005
fDate :
October 28 - November 1, 2005
Firstpage :
990
Lastpage :
994
Keywords :
Computer architecture; Decoding; Delay; Design optimization; Error correction; Error correction codes; Forward error correction; Hardware; Reed-Solomon codes; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2005. Conference Record of the Thirty-Ninth Asilomar Conference on
ISSN :
1058-6393
Print_ISBN :
1-4244-0131-3
Type :
conf
DOI :
10.1109/ACSSC.2005.1599906
Filename :
1599906
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3329251
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