Title :
An effective processing on a digital signal processor with complex arithmetic capability
Author :
Negishi, Yoshimasa ; Watanabe, Eiji ; Nishihara, Akinori ; Yanagisawa, Takeshi
Author_Institution :
Fac. of Syst. Eng., Shibaura Inst. of Technol., Tokyo, Japan
Abstract :
Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. First, we show that 2D circuits and transversal circuits with real coefficients can be implemented by complex multiplications. Next, we introduce a new computational mode (advanced mode) and a new multiplier into PSI, a type of DSPC which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation
Keywords :
digital arithmetic; digital signal processing chips; multiplying circuits; pipeline processing; timing; 2D circuits; DSP; PSI; complex arithmetic capability; complex multiplications; computational mode; digital signal processor; multiplier; real coefficients; transversal circuits; Circuit simulation; Digital arithmetic; Digital signal processing; Digital signal processors; Educational technology; Equations; Modeling; Research and development; Signal processing algorithms; Systems engineering and theory;
Conference_Titel :
Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on
Conference_Location :
Chiangmai
Print_ISBN :
0-7803-5146-0
DOI :
10.1109/APCCAS.1998.743896
