DocumentCode
3330691
Title
Design of an Ultra Low-Power RFID Baseband Processor Featuring an AES Cryptography Engine
Author
Ricci, Andrea ; Grisanti, Matteo ; Munari, Ilaria De ; Ciampolini, Paolo
fYear
2008
fDate
3-5 Sept. 2008
Firstpage
831
Lastpage
838
Abstract
Cheap passive radio frequency identification (RFID) tags operating in ultra high frequency (UHF) bands are fostering innovation in several field such as building access control, goods tracking, supply chains management and automatic product checkout. RFID transponders can also be coupled to tiny sensors, enabling non invasive monitoring of environmental and personal parameters. To ensure the privacy of highly sensitive data, encryption and authentication capabilities should be embedded in RFID devices, in a fashion compatible with tight power budgets of wireless devices. In this contribution, a baseband-processor is introduced, which complies with ISO 18000-6C (EPC Class1 Gen2) protocol and integrates AES primitives aimed at secure data transmission. Performance of passive RFID devices is limited by the available power, harvested from the incoming radiation. Power-saving strategies are devised, both at the system and the circuit levels. A set of standard cells has been designed, suitable for near-threshold voltage operations. Physical implementation on CMOS 0.18um technology has been carried out and the chip has being fabricated.
Keywords
Access control; Baseband; Buildings; CMOS technology; Cryptography; Engines; Frequency; RFID tags; Radiofrequency identification; Technological innovation; AES; RFID; baseband processor; cryptography; digital core; standard-cell;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on
Conference_Location
Parma
Print_ISBN
978-0-7695-3277-6
Type
conf
DOI
10.1109/DSD.2008.129
Filename
4669322
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