DocumentCode
3330835
Title
Testing high speed high accuracy analog to digital converters embedded in systems on a chip
Author
Max, Solomon
Author_Institution
LTX Corp., Westwood, MA, USA
fYear
1999
fDate
1999
Firstpage
763
Lastpage
771
Abstract
High speed high accuracy ADC´s built on SOC IC´s tested on digital testers with round-trip-delays, must measure INL, DNL, Gain and Offset. Algorithm efficiencies and round-trip-delay sensitivity are analyzed. Efficient test methods are described
Keywords
analogue-digital conversion; delay estimation; embedded systems; gain measurement; high-speed integrated circuits; integrated circuit testing; timing; AC histogram test method; DNL; INL; SOC IC; algorithm efficiencies; differential nonlinearity; digital testers; gain; high speed high accuracy A/D converters; integral nonlinearity; offset; ramp histogram test method; round-trip-delay sensitivity; round-trip-delays; test methods; timing constraints; Analog-digital conversion; Circuit testing; Clocks; Feedback loop; Histograms; Logic testing; System testing; System-on-a-chip; Test pattern generators; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1999. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-5753-1
Type
conf
DOI
10.1109/TEST.1999.805806
Filename
805806
Link To Document