Title :
Progressive transmission line matching when encountering via mismatching
Author :
Daraban, Mihai ; Pitica, D.
Author_Institution :
Appl. Electron. Dept., Tech. Univ. of Cluj-Napoca, Cluj-Napoca, Romania
Abstract :
When it comes to transmission lines the common causes for signal integrity (SI) problems are the mismatches caused during the routing process. From all the possible causes for mismatches, vias are the most common ones. In the literature, different approaches are proposed to resolve the SI problems caused by vias: stitching vias, matching the driver output impedance to the transmission line´s new value [1]. Stitching vias can be used when printed circuit boards (PCBs) are used with more than four layers. Additionally a smaller value for the series-matching resistor improves the signal rise/fall time, but also increases the ringing effect´s amplitude. In the paper, a solution for improving the signal at the receiver is proposed that can be used even on four layer PCB. The proposed solution keeps the improvements obtained through matching the driver output to the transmission line´s modified impedance, without increasing the ringing effect amplitude.
Keywords :
equivalent circuits; printed circuits; transmission lines; vias; SI problems; driver output impedance; four layer PCB; printed circuit boards; progressive transmission line matching; receiver; ringing effect amplitude; routing process; series-matching resistor; signal integrity problem; stitching vias; transmission line equivalent electric model; transmission line modified impedance; Capacitance; Computational modeling; Impedance; Impedance matching; Receivers; Routing; Signal resolution; Transmission line; discontinuity; matching; signal integrity; vias;
Conference_Titel :
Design and Technology in Electronic Packaging (SIITME), 2013 IEEE 19th International Symposium for
Conference_Location :
Galati
DOI :
10.1109/SIITME.2013.6743659