DocumentCode :
3330923
Title :
A dynamic scheduling framework for emerging heterogeneous systems
Author :
Ravi, Vignesh T. ; Agrawal, Gagan
Author_Institution :
Dept. of Comput. Sci. & Eng., Ohio State Univ., Columbus, OH, USA
fYear :
2011
fDate :
18-21 Dec. 2011
Firstpage :
1
Lastpage :
10
Abstract :
A trend that has materialized, and has given rise to much attention, is of the increasingly heterogeneous computing platforms. Recently, it has become very common for a desktop or a notebook computer to be equipped with both a multi-core CPU and a GPU. Application development for exploiting the aggregate computing power of such an environment is a major challenge today. Particularly, we need dynamic work distribution schemes that are adaptable to different computation and communication patterns in applications, and to various heterogeneous configurations. This paper describes a general dynamic scheduling framework for mapping applications with different communication patterns to heterogeneous architectures. We first make key observations about the architectural tradeoffs among heterogeneous resources and the communication pattern of an application, and then infer constraints for the dynamic scheduler. We then present a novel cost model for choosing the optimal chunk size in a heterogeneous configuration. Finally, based on general framework and cost model we provide optimized work distribution schemes to further improve the performance.
Keywords :
computer architecture; graphics processing units; multiprocessing systems; notebook computers; processor scheduling; GPU; architectural tradeoffs; communication pattern; computation pattern; cost model; desktop computer; dynamic scheduler; dynamic scheduling framework; dynamic work distribution scheme; emerging heterogeneous system; heterogeneous architecture; heterogeneous configuration; heterogeneous resource; mapping application; multicore CPU; notebook computer; optimal chunk size; optimized work distribution scheme; Central Processing Unit; Computer architecture; Dynamic scheduling; Graphics processing unit; Instruction sets; Kernel; Mathematical model;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing (HiPC), 2011 18th International Conference on
Conference_Location :
Bangalore
Print_ISBN :
978-1-4577-1951-6
Electronic_ISBN :
978-1-4577-1949-3
Type :
conf
DOI :
10.1109/HiPC.2011.6152724
Filename :
6152724
Link To Document :
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