DocumentCode :
3332163
Title :
Failure analysis of timing and IDDq-only failures from the SEMATECH test methods experiment
Author :
Nigh, Phil ; Vallett, Dave ; Patel, Atul ; Wright, Jason ; Motika, Franco ; Forlenza, Donato ; Kurtulik, Ray ; Chong, Wendy
Author_Institution :
IBM Microelectron., Essex Junction, VT, USA
fYear :
1999
fDate :
1999
Firstpage :
1152
Lastpage :
1161
Abstract :
SEMATECH has sponsored a “Test Method Evaluation” study to understand the trade-offs among the most common test methodologies used in the industry. This paper presents the results of the failure analysis portion of that project. The testing, reliability stressing, characterization, fault diagnosis and physical analysis results are presented for 25 devices including “IDDq-only” failures and “delay test-only” failures
Keywords :
OBIC; boundary scan testing; failure analysis; fault simulation; integrated circuit testing; logic testing; timing; IDDq-only failures; OBIC; SEMATECH test methods experiment; delay test-only failures; failure analysis; fault diagnosis; functional tests; hot spots; photon emission microscopy; reliability stressing; scan-based stuck-at fault tests; test method evaluation; timing failures; Analytical models; Failure analysis; Fault detection; Information analysis; Logic testing; Manufacturing industries; Microelectronics; Optimization methods; TV; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1999. Proceedings. International
Conference_Location :
Atlantic City, NJ
ISSN :
1089-3539
Print_ISBN :
0-7803-5753-1
Type :
conf
DOI :
10.1109/TEST.1999.805883
Filename :
805883
Link To Document :
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