Title :
LSI Layout Checking Using Bipolar Device Recognition Technique
Author_Institution :
IBM Data Systems Division, East Fishkill Hopewell Junction, NY
Abstract :
Layout errors often result in nonfunctioning devices that still adhere to all layout tolerance rules. Reported here is a method for locating such errors in addition to the tolerance rule checking.
Keywords :
Bipolar integrated circuits; Data systems; Integrated circuit layout; Ion implantation; Large scale integration; Resistors; Schottky barriers; Schottky diodes; Shape; Silicon;
Conference_Titel :
Design Automation, 1979. 16th Conference on
DOI :
10.1109/DAC.1979.1600094