• DocumentCode
    3333011
  • Title

    Improved Delta Sigma Modulators for high speed applications

  • Author

    Gautier, David ; Robbe, Michel ; Doucet, Stephan ; Lemoine, Renaud ; Bachir, Smail ; Duvanaud, Claude

  • Author_Institution
    ACCO Semicond., Louveciennes, France
  • fYear
    2009
  • fDate
    2-5 Aug. 2009
  • Firstpage
    385
  • Lastpage
    388
  • Abstract
    This article presents a new Low-Pass Delta Sigma Modulators (LPDS) architecture to improve the noise shaping for high frequency applications. The errors resulting from approximations made by calculating with 1/2N coefficients are compensated. Simulations with extracted parasitics of the layout are made and give a SNDR of 111 dB, 3.8 mW power consumption at 4 GHz in 65 nm CMOS technology for UMTS standard.
  • Keywords
    CMOS integrated circuits; delta-sigma modulation; high-speed integrated circuits; 1/2N coefficients; CMOS technology; UMTS standard; frequency 4 GHz; high-speed application; layout extracted parasitics; low-pass delta sigma modulator architecture; noise figure 111 dB; noise shaping; power 3.8 mW; size 65 nm; CMOS technology; Capacitors; Delta-sigma modulation; Energy consumption; Feedback; Finite wordlength effects; Frequency; Noise shaping; Signal to noise ratio; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on
  • Conference_Location
    Cancun
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4244-4479-3
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2009.5236075
  • Filename
    5236075
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3333011