Enhancement of MCM testability using an embedded reconfigurable FPGA

Author

York, John ; Powell, Tim ; Dehkordi, Peyman ; Bouldin, Don

Author_Institution

Dept. of Electr. Eng., Tennessee Univ., Knoxville, TN, USA

fYear

1997

fDate

8-10 Oct 1997

Firstpage

165

Lastpage

173

Abstract

The testability of an MCM can be enhanced significantly for very little cost whenever a reprogrammable FPGA component that is already embedded in the MCM for functionality is utilized for diagnostics. This approach can have some of the characteristics of a smart substrate which uses the scan cell beside-the-signal-path (BSP) methodology. The design and implementation of an MCM with this capability is presented along with descriptions of the self-test algorithms, fault isolation and real-time testing and monitoring that this method provides

Keywords

built-in self test; field programmable gate arrays; integrated circuit testing; multichip modules; real-time systems; reconfigurable architectures; BSP smart substrate; MCM testability; embedded reconfigurable FPGA; fault isolation; monitoring; real-time testing; scan cell beside-the-signal-path methodology; self-test algorithm; Algorithm design and analysis; Circuit testing; Cost function; Design methodology; Electronic mail; Field programmable gate arrays; Integrated circuit interconnections; Integrated circuit testing; Probes; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Innovative Systems in Silicon, 1997. Proceedings., Second Annual IEEE International Conference on

Conference_Location

Austin, TX

ISSN

1094-7116

Print_ISBN

0-7803-4276-3

Type

conf

DOI

10.1109/ICISS.1997.630257

Filename

630257