Title :
Quasi Two-level Operation of a Five-level Inverter
Author :
Adam, G.P. ; Finney, S.J. ; Williams, B.W.
Author_Institution :
Strathclyde Univ., Glasgow
fDate :
May 29 2007-June 1 2007
Abstract :
In this paper a five-level inverter operational mode termed quasi two-level operation is proposed. The multilevel capacitors function in a soft clamping mode where capacitor voltage balancing is maintained by varying the transient dwell time at each level. Two balancing techniques are proposed. The first is based on the selection of suitable resistors to be connected across each dc link capacitor in order to maintain balance. The second method is based on varying the dwell time at the intermediate nodes of the dc link capacitors. The validity of the operational mode and the two proposed balancing techniques are confirmed by simulations and experiments.
Keywords :
PWM invertors; capacitors; capacitor voltage balancing; dc link capacitor; five-level inverter; multilevel capacitors function; quasi two-level operation; soft clamping mode; Capacitors; Circuits; Clamps; Diodes; Leg; Pulse width modulation inverters; Resistors; Space vector pulse width modulation; Switches; Voltage control;
Conference_Titel :
Compatibility in Power Electronics, 2007. CPE '07
Conference_Location :
Gdansk
Print_ISBN :
1-4244-1055-X
Electronic_ISBN :
1-4244-1055-X
DOI :
10.1109/CPE.2007.4296557