• DocumentCode
    3334103
  • Title

    PAM Map: An architecture-independent logic block mapping algorithm for SRAM-based FPGAs

  • Author

    Shao, Yun ; Lai, Jinmei ; Wang, Jian ; Tong, Jiarong

  • Author_Institution
    ASIC & Syst. State Key Lab., Fudan Univ., Shanghai
  • fYear
    2009
  • fDate
    1-3 April 2009
  • Firstpage
    15
  • Lastpage
    19
  • Abstract
    In this paper, we consider the general problem of mapping a given logic circuit onto an SRAM-based FPGA with programmable logic blocks of arbitrary architectures. We formulate the problem as a graph matching problem and present an architecture-independent algorithm for this purpose. This algorithm also obtains a best area saving of 4% compared to architecture-dependent methods.
  • Keywords
    SRAM chips; field programmable gate arrays; graph theory; pattern matching; PAM Map; SRAM-based FPGA; architecture-independent logic block mapping algorithm; field programmable gate array; graph matching problem; logic circuit; programmable logic block; Field programmable gate arrays; Logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Programmable Logic, 2009. SPL. 5th Southern Conference on
  • Conference_Location
    Sao Carlos
  • Print_ISBN
    978-1-4244-3847-1
  • Type

    conf

  • DOI
    10.1109/SPL.2009.4914887
  • Filename
    4914887
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3334103