General and efficient multiple list traversal for concurrent fault simulation

Accuracy, generality and efficiency are critical factors when fault simulation of VLSI circuits is the target. The concurrent algorithm is the only solution when generality and accuracy is required. Its differential representation of the network status saves memory and CPU time, but due to its complexity the implementations grow in size and lose in performance as soon as higher abstraction levels are added beyond the gate one. In the paper the minimal information concept is discussed, and its applications to the key algorithms for concurrent event-driven simulation are shown. New advanced generalized techniques for multiple list traversal (MLT), trigger inhibition, fraternal event processing, list events, edge sensitive inputs, compile-driven evaluation functions, functional fault sources and clock suppression are presented for the first time in a truly unified context