Application of active current mirrors to improve the speed of analog decoder circuits

Current-mirrors are widely used in the blocks of analog decoder circuits based on the sum-product algorithm. The simple current mirrors, using diode-connected input devices that traditionally have been used are limited in speed when their inputs are loaded with long wires. We present a block diagram for a large (6, 3) LDPC code and an estimation for the largest possible wiring capacitance in this decoder. We show that when active current mirrors are used on the inputs of the equality nodes, their speed is enhanced. The power and speed for a seven-input equality node are simulated with the basic mirrors and with the modified current-mirror circuits. We show through simulations in STMicroelectronics CMOS 90 nm technology and with a supply voltage of 0.4 V that the power/speed ratio for a 7-input equality node can be improved by approximately 50% with the enhanced topology.