DocumentCode :
3334712
Title :
A general Image Processing architecture for FPGA
Author :
Cappabianco, Fábio ; Araujo, Guido ; Azevedo, Rodolfo ; Falcao, Alexandre
Author_Institution :
Inst. of Comput., Univ. of Campinas, Campinas
fYear :
2009
fDate :
1-3 April 2009
Firstpage :
27
Lastpage :
32
Abstract :
The image foresting transform (IFT) is a general tool for the design of image processing operators based on dynamic programming. Silicon image forest transform (SIFT) is a fast 8-bit data architecture for IFT-based operators in FPGA. It can implement queue-based methods such as morphological reconstructions, watershed transforms, shape saliences, distance transforms, skeletonization, edge tracking, with runtime gains from hundreds to thousands over the respective implementations in software. In this paper, we further extend the SIFT architecture to support 8- and 16-bit data and kernel-based operators such as dilation/erosion, smoothing, border enhancement, and sharpness filters. Moreover, we considerably improved the clock operation frequency and processing parallelism of SIFT.
Keywords :
dynamic programming; field programmable gate arrays; filtering theory; image enhancement; image reconstruction; queueing theory; transforms; FPGA; IFT-based operators; border enhancement; data architecture; distance transforms; dynamic programming; edge tracking; image processing architecture; morphological reconstructions; queue-based methods; runtime gains; shape saliences; sharpness filters; silicon image forest transform; skeletonization; watershed transforms; Computer architecture; Dynamic programming; Field programmable gate arrays; Image processing; Image reconstruction; Process design; Runtime; Shape; Silicon; Smoothing methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Programmable Logic, 2009. SPL. 5th Southern Conference on
Conference_Location :
Sao Carlos
Print_ISBN :
978-1-4244-3847-1
Type :
conf
DOI :
10.1109/SPL.2009.4914921
Filename :
4914921
Link To Document :
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