• DocumentCode
    3334894
  • Title

    The Implementation of a Hybrid-Execute-In-Place Architecture to Reduce the Embedded System Memory Footprint and Minimize Boot Time

  • Author

    Benavides, Tony ; Treon, Justin ; Hulbert, Jared ; Chang, Willie

  • Author_Institution
    California State Univ., Sacramento
  • fYear
    2007
  • fDate
    13-15 Aug. 2007
  • Firstpage
    473
  • Lastpage
    479
  • Abstract
    Success in the embedded world revolves around two key concepts: cost effectiveness and performance. The ability for an operating system to boot quickly combined with speedy application usage at runtime is important with regards to consumer unit adoption. The most common memory sub-system setup in cellular phone architectures today is what is called an eXecute-In-Place architecture. This type of memory sub-system defines the execution of code and data, directly from NOR flash memory. An additional memory architecture of choice is called a store and download architecture. This is a memory sub-system where the code gets copied to RAM at boot time and executes out of the RAM. This paper explores the addition of a new memory usage model called the balanced XIP system, The result is a. system that combines a small RAM memory requirement with a performance increase for improved targeted application and boot time execution.
  • Keywords
    memory architecture; operating systems (computers); random-access storage; storage management; NOR flash memory; RAM memory; boot time minimization; code execution; consumer unit adoption; embedded system memory footprint reduction; hybrid-execute-in-place architecture; memory architecture; memory subsystem; memory usage model; operating system; speedy application usage; store-and-download architecture; Application software; Batteries; Cellular phones; Computer architecture; Delay; Embedded system; Flash memory; Memory architecture; Random access memory; Read-write memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Reuse and Integration, 2007. IRI 2007. IEEE International Conference on
  • Conference_Location
    Las Vegas, IL
  • Print_ISBN
    1-4244-1500-4
  • Electronic_ISBN
    1-4244-1500-4
  • Type

    conf

  • DOI
    10.1109/IRI.2007.4296665
  • Filename
    4296665