Title :
Modelling of internal noises in VLSI chip constructed on programmable logic array
Author :
Vasiltsov, Igor V. ; Mandzij, Bogdan A.
Author_Institution :
Inst. of Comput. Inf. Technol., Ternopil Acad. of Nat. Econ., Ukraine
Abstract :
In this paper the problem of internal noises modelling in the digital devices constructed on the programmable logic array has been considered. Mathematical models for evaluation of the statistical parameters (mathematical expectation, dispersion) of internal noises have been obtained. The obtained equations take into account the properties of the chip constructive realization, as well as the spread constructive and technological parameters of microcircuits
Keywords :
VLSI; integrated circuit modelling; integrated circuit noise; programmable logic arrays; VLSI chip; internal noises modelling; mathematical models; microcircuits; programmable logic array; statistical parameters; Electromagnetic interference; Feeds; Logic arrays; Logic design; Logic devices; Logic gates; Mathematical model; Noise level; Programmable logic arrays; Very large scale integration;
Conference_Titel :
Telecommunications in Modern Satellite, Cable and Broadcasting Services, 1999. 4th International Conference on
Conference_Location :
Nis
Print_ISBN :
0-7803-5768-X
DOI :
10.1109/TELSKS.1999.806260
