Title :
Four layer wiring using adjacent-layer vias
Author :
Wu, Tung K. ; Brady, Martin L.
Author_Institution :
Dept. of Electr. Comput. Eng., Pennysylvania State Univ., University Park, PA, USA
Abstract :
An algorithm is presented which, given a two-dimensional wire layout in knock-knee mode, produces a legal wiring (layer-assignment) using only adjacent-layer vias and at most four layers. The previous four-layer wiring algorithm requires technologically impractical vias between non-adjacent layers. This algorithm has important implications for practical automatic wire routing, since many knock-knee layout algorithms rely on the four-layer wiring technique to complete their routing
Keywords :
VLSI; circuit layout CAD; network topology; IC routeing; VLSI layout; adjacent-layer vias; automatic wire routing; four-layer wiring algorithm; knock-knee layout algorithms; layer-assignment; Integrated circuit interconnections; Integrated circuit layout; Integrated circuit technology; Law; Legal factors; Partitioning algorithms; Routing; Very large scale integration; Wire; Wiring;
Conference_Titel :
VLSI, 1991. Proceedings., First Great Lakes Symposium on
Conference_Location :
Kalamazoo, MI
Print_ISBN :
0-8186-2170-2
DOI :
10.1109/GLSV.1991.143960
