DocumentCode
3335353
Title
Development of a 20 GS/s sampler chip in 130nm CMOS technology
Author
Bogdan, Mircea ; Frisch, H.J. ; Genat, Jean-Francois C. ; Grabas, Herve ; Heintz, Mary K. ; Meehan, Samuel ; Oberla, Eric ; Ruckman, Larry L. ; Tang, Fukun ; Varner, Gary S.
Author_Institution
Enrico Fermi Inst., Univ. of Chicago, Chicago, IL, USA
fYear
2009
fDate
Oct. 24 2009-Nov. 1 2009
Firstpage
1929
Lastpage
1931
Abstract
In the scope of time of flight measurements at the scale of a few pico-seconds, a CMOS fast sampler chip is being developed in 130nm CMOS technology. It includes a 10-20GS/s timing generator lockable on a 40-80 MHz clock and four channels of 250 sampling cells able to record up to of 25ns of analog information. Each sampling cell is integrated with a comparator allowing a 12-bit analog to digital conversion. The design and preliminary tests results are presented.
Keywords
digital-analogue conversion; nuclear electronics; CMOS fast sampler chip; CMOS technology; analog information; analog-digital conversion; sampling cells; time of flight measurements; timing generator; Analog-digital conversion; Application specific integrated circuits; Bandwidth; CMOS technology; Clocks; Frequency conversion; Prototypes; Sampling methods; Switches; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE
Conference_Location
Orlando, FL
ISSN
1095-7863
Print_ISBN
978-1-4244-3961-4
Electronic_ISBN
1095-7863
Type
conf
DOI
10.1109/NSSMIC.2009.5402154
Filename
5402154
Link To Document