DocumentCode :
3335369
Title :
Two-dimensional multirate systolic array design for artificial neural networks
Author :
Khan, Emdadur R. ; Ling, Nam
Author_Institution :
Nat. Semicond., Santa Clara, CA, USA
fYear :
1991
fDate :
1-2 Mar 1991
Firstpage :
186
Lastpage :
193
Abstract :
In this paper a novel design of neural networks using 2-dimensional systolic array is proposed. Two techniques are applied in the design, namely, 2-dimensional pipelining and multirate processing (2 level clocking). 2-dimensional pipelining operation gives significant improvement in computation time compared to the currently known 1D and 2D systolic implementation schemes. Besides, multirate clocking is used so that weights (synapses) can be transmitted and passed systolically in a rate much higher than activation voltages, to achieve maximum array throughput and to eliminate global interconnections present in many array (including systolic) designs (thus reducing synchronization and propagation delay problems). This scheme of passing weights also saves area significantly since local storage area for the weights can be reduced. The design is applied to the implementation of a Hopfield neural net
Keywords :
neural nets; pipeline processing; systolic arrays; 2-dimensional pipelining; 2D systolic implementation; Hopfield neural net; artificial neural networks; multirate clocking; multirate systolic array design; weight passing scheme; Artificial neural networks; Biological neural networks; Biology computing; Clocks; Computer vision; Neural networks; Pipeline processing; Signal processing algorithms; Systolic arrays; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1991. Proceedings., First Great Lakes Symposium on
Conference_Location :
Kalamazoo, MI
Print_ISBN :
0-8186-2170-2
Type :
conf
DOI :
10.1109/GLSV.1991.143964
Filename :
143964
Link To Document :
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