DocumentCode
3337700
Title
Interactive Back-annotation of Worst-case Execution Time Analysis for Java Microprocessors
Author
Harmon, Trevor ; Klefstad, Raymond
Author_Institution
Univ. of California Irvine, Irvine
fYear
2007
fDate
21-24 Aug. 2007
Firstpage
209
Lastpage
216
Abstract
As real-time systems become more prevalent, there is a need to guarantee that these increasingly complex systems perform as designed. One technique involves a static analysis to place an upper bound on worst-case execution time (WCET). Tools for conducting this analysis typically require the developer to digest assembly opcodes, hexadecimal addresses, and other low-level details in order to make sense of the results. Java-specific processors offer a way out of this complexity. Such processors make Java software more predictable, and as a consequence, timing analysis of a real-time system becomes less computationally intensive. WCET analysis tools based on these processors can thus offer more powerful features at higher levels of abstraction. As proof of this concept, we present a tool for static WCET analysis of Java processors. Our performance measurements show that this tool makes WCET analysis interactive, offering continuous feedback to the developer in the form of back-annotations.
Keywords
Java; program diagnostics; real-time systems; Java microprocessor; interactive back-annotation; real-time system; static analysis; worst-case execution time analysis; Delay; Design engineering; Java; Microprocessors; Performance analysis; Real time systems; Scheduling algorithm; Throughput; Time measurement; Upper bound;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded and Real-Time Computing Systems and Applications, 2007. RTCSA 2007. 13th IEEE International Conference on
Conference_Location
Daegu
ISSN
1533-2306
Print_ISBN
978-0-7695-2975-2
Type
conf
DOI
10.1109/RTCSA.2007.44
Filename
4296854
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