• DocumentCode
    3337917
  • Title

    Neural network based power estimation on chip specification

  • Author

    Hou, Ligang ; Wu, Xinyi ; Wu, Wuchen

  • Author_Institution
    VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
  • fYear
    2010
  • fDate
    23-25 June 2010
  • Firstpage
    187
  • Lastpage
    190
  • Abstract
    This paper forwards a neural network based VLSI power estimation on VLSI chip specification. This paper used neural network to perform VLSI power estimation. Experiments were made on chip specification parameters extracted from the datasheet of TI series micro-controllers. Different net structure, training plans and vector organizations were applied. Based on limited number of test vector, experimental results showed the neural network based power estimation could give acceptable results on chip power with specific net structure. This method can achieve a much faster power estimation result on datasheet of the same kind of VLSI chips without simulation and analysis or simulations of detail structure and interconnections. Higher training/testing ratio leads to a more accurate power estimation value.
  • Keywords
    Analytical models; Circuit simulation; Circuit testing; Data mining; Energy consumption; Least squares approximation; Network-on-a-chip; Neural networks; Power dissipation; Very large scale integration; chip specification; neural network; power estimation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Sciences and Interaction Sciences (ICIS), 2010 3rd International Conference on
  • Conference_Location
    Chengdu, China
  • Print_ISBN
    978-1-4244-7384-7
  • Electronic_ISBN
    978-1-4244-7386-1
  • Type

    conf

  • DOI
    10.1109/ICICIS.2010.5534739
  • Filename
    5534739