The VHDL-MOS package for transistor-level event-driven simulation

Author

Bruma, Serbari ; Otten, R.H.J.M.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

1999

fDate

1999

Firstpage

86

Lastpage

90

Abstract

This paper presents a VHDL package, called VHDL-MOS, which allows the mixed-mode simulation of deep submicron CMOS circuits using an event-driven simulator. Digital gate-level descriptions can coexist with analog-like transistor-level descriptions inside the same event-driven simulation kernel. Accurate waveforms, timing, and power analysis are obtained for the analog-like described part of the circuit. Simulation results show the efficiency and accuracy in simulating large deep-submicron circuits

Keywords

CMOS integrated circuits; circuit simulation; discrete event simulation; hardware description languages; mixed analogue-digital integrated circuits; software packages; timing; ASIC; VHDL package; VHDL-MOS package; analog-like transistor-level descriptions; deep submicron CMOS circuits; digital gate-level descriptions; mixed-mode simulation; power analysis; simulation kernel; timing; transistor-level event-driven simulation; CMOS analog integrated circuits; CMOS digital integrated circuits; Circuit simulation; Discrete event simulation; Kernel; Laboratories; Logic; Packaging; Signal design; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International

Conference_Location

Washington, DC

Print_ISBN

0-7803-5632-2

Type

conf

DOI

10.1109/ASIC.1999.806480

Filename

806480