Title :
Efficient realization of FPGA-based two dimensional discrete cosine transform
Author :
Helal, Helal Ibrahim ; Salama, Aly Ezzat ; Mashali, S.
Author_Institution :
Dept. of Electron. & Commun., Cairo Univ., Giza, Egypt
Abstract :
In this paper, a new algorithm for the computation of a 2-D DCT is presented. The computation complexity as measured in terms of the number of multiplications and additions is kept to a minimum. The algorithm is amenable to implementation using field programmable gate arrays (FPGAs). An example of a 4×4 2-D DCT is presented, and its performance is evaluated
Keywords :
VLSI; computational complexity; discrete cosine transforms; field programmable gate arrays; additions; computation complexity; field programmable gate arrays; multiplications; two dimensional discrete cosine transform; Computational complexity; Convolution; Convolutional codes; Discrete cosine transforms; Discrete transforms; Field programmable gate arrays; Hardware; Karhunen-Loeve transforms; Pipeline processing; Signal processing algorithms;
Conference_Titel :
ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5632-2
DOI :
10.1109/ASIC.1999.806500
