Title :
A new phase accumulator with single transistor path using pass transistor logic
Author :
Cho, Kyoang-Rok ; Larson, R. ; Lu, Shih-Lien
Author_Institution :
Sch. of Electr. Eng., Chung-Buk Nat. Univ., Cheongju, South Korea
Abstract :
A novel phase accumulator based on pass-transistor logic is designed. This accumulator can be pipelined and has only one pass-transistor in its delay path. It can be used in implementing a numerically controlled oscillator (NCO). Our design is compared with several other design options and found to be the best in power and performance
Keywords :
CMOS logic circuits; adders; direct digital synthesis; integrated circuit design; logic simulation; low-power electronics; oscillators; pipeline processing; 0.35 mum; 2 GHz; 3 V; 32 mW; TSPC adder; delay path; digital communications; direct frequency synthesis; numerically controlled oscillator; pass transistor logic; phase accumulator; pipelined accumulator; single transistor path; split-level CPL adder; static CMOS adder; Adders; Circuit synthesis; Delay; Digital communication; Frequency; Logic design; Logic devices; Phase locked loops; Timing; Voltage-controlled oscillators;
Conference_Titel :
ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5632-2
DOI :
10.1109/ASIC.1999.806519
