DocumentCode :
3339053
Title :
SAT based Verification Tool for Labeled Transition System
Author :
Park, Sachoun ; Kwon, Gihwon
Author_Institution :
Kyonggi Univ., Suwon
fYear :
2007
fDate :
20-22 Aug. 2007
Firstpage :
221
Lastpage :
226
Abstract :
Multi-threaded Java programming such as an internet server program is difficult, because it is hard to detect subtle errors within multi-threading. LTSA is a too/for modeling and analyzing for catching some kinds of thread bugs, but still there remains scalability problem to deal with bigger applications. In this paper, we introduce a SAT based verification tool for Labeled Transition System and we explain LTS semantics and their CNF encoding. To verify large model, we focus our attention on efficient encoding for given model. In our tool, the property to be checked is expressed by either LTS or LTL formula based on Fluent. In order to solve a problem, LTSs and property are represented with CNF formulae, the input format to SAT-solver.
Keywords :
Java; computability; computational linguistics; multi-threading; program debugging; program verification; temporal logic; CNF encoding; Fluent; SAT based verification tool; labeled transition system semantics; linear temporal logic; multithreaded Java programming; thread bug detection; Application software; Computer bugs; Encoding; Internet; Java; Scalability; Software engineering; Software systems; Web server; Yarn; Bounded Model checking; Formal Verification; Labeled Transition System; Linear Temporal Logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Engineering Research, Management & Applications, 2007. SERA 2007. 5th ACIS International Conference on
Conference_Location :
Busan
Print_ISBN :
0-7695-2867-8
Type :
conf
DOI :
10.1109/SERA.2007.117
Filename :
4296939
Link To Document :
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