Title :
A fast VLSI implementation of sorting algorithm for standard median filters
Author :
Yu, Hyeong-Seok ; Lee, Joon-Yeop ; Cho, Jun-dong
Author_Institution :
Dept. of Electr. & Comput. Eng., Sungkyunkwan Univ., Kyeongki, South Korea
Abstract :
A new and fast sorting algorithm and architecture for standard median filters is proposed. This algorithm is suitable for VLSI implementation with low area that results in low switching activity and no feedback loop. The main idea is to employ a so-called history matrix for fast searching the rank of the oldest (first-in) window element. We simulated the proposed algorithm using SYNOPSYSTM and the result showed the efficiency in real time operation
Keywords :
VLSI; circuit simulation; high-speed integrated circuits; matrix algebra; median filters; real-time systems; sorting; SYNOPSYS; algorithm simulation; fast VLSI implementation; history matrix; low switching activity; median filters; oldest window element; real time operation; sorting algorithm; Delay; Digital filters; Hardware; History; Nonlinear filters; Signal processing algorithms; Sorting; Speech analysis; Speech processing; Very large scale integration;
Conference_Titel :
ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5632-2
DOI :
10.1109/ASIC.1999.806540
