Intellectual property module of a highly parametrizable embedded stack processor

Author

Röwer, Thomas ; Stadler, Manfred ; Thalmann, Marltus ; Felber, Norbert ; Kaeslin, Hubert ; Fichtner, Wolfgang

Author_Institution

Integrated Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland

fYear

1999

fDate

1999

Firstpage

399

Lastpage

403

Abstract

Customizable microprocessors pose numerous design problems that arise from application-specific needs for data operations, word widths, storage capacities, and interfaces. We present a stack processor that features a customizable instruction set, extensive parametrization, and a synthesis model with separate core and interface modules. Verification uses a reference model automatically derived from a generic model and the current parameter settings

Keywords

CMOS digital integrated circuits; application specific integrated circuits; embedded systems; formal verification; hardware-software codesign; industrial property; instruction sets; integrated circuit design; microprocessor chips; modules; CMOS process; application-specific needs; core module; current parameter settings; customizable instruction set; customizable microprocessors; data operations; design problems; generic model; highly parametrizable embedded stack processor; intellectual property module; interface module; parametrization; reference model; storage capacities; synthesis model; verification; word widths; Application specific integrated circuits; Computer architecture; Embedded software; Intellectual property; Laboratories; Microprocessors; Payloads; Process design; Productivity; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International

Conference_Location

Washington, DC

Print_ISBN

0-7803-5632-2

Type

conf

DOI

10.1109/ASIC.1999.806542

Filename

806542