DocumentCode

3339586

Title

Think hardware: behaviroal design reuse

Author

Raghavan, Vijay P.

Author_Institution

Synopsys Inc.

fYear

1999

fDate

1999

Firstpage

420

Lastpage

420

Keywords

Arithmetic; Automata; Clocks; Cost function; Cranes; Hardware design languages; Logic; Pipeline processing; Throughput; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International

Print_ISBN

0-7803-5632-2

Type

conf

DOI

10.1109/ASIC.1999.806547

Filename

806547