• DocumentCode
    3339717
  • Title

    OBDD-based optimization of input probabilities for weighted random pattern generation

  • Author

    Krieger, R. ; Becker, B. ; Okmen, C.

  • Author_Institution
    Comput. Sci. Dept., Frankfurt Univ., Germany
  • fYear
    1995
  • fDate
    27-30 June 1995
  • Firstpage
    120
  • Lastpage
    129
  • Abstract
    Numerous methods have been devised to compute and to optimize fault detection probabilities for combinational circuits. The methods range from topological to algebraic. In combination with OBDDs, algebraic methods have received more and more attention. Recently, an OBDD based method has been presented which allows the computation of exact fault detection probabilities for many combinational circuits. We combine this method with strategies making use of necessary assignments (computed by an implication procedure). The experimental results show that the resulting method leads to a decrease of the time and space requirements for computing fault detection probabilities of the hard faults by a factor of 4 on average compared to the original algorithm. By this means it is now possible to efficiently use the OBDD based approach also for the optimization of input probabilities for weighted random pattern testing. Since in contrast to other optimization procedures this method is based on the exact fault detection probabilities we succeed in the determination of weight sets of superior quality, i.e. the test application time (number of random patterns) is considerably reduced compared to previous approaches.<>
  • Keywords
    combinational circuits; decision theory; fault diagnosis; logic testing; optimisation; probability; random processes; OBDD based optimization; OBDD-based optimization; combinational circuits; exact fault detection probabilities; fault detection probabilities; hard faults; implication procedure; input probabilities; weighted random pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Combinational circuits; Computer science; Electrical fault detection; Fault detection; Linear feedback shift registers; Optimization methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Fault-Tolerant Computing, 1995. FTCS-25. Digest of Papers., Twenty-Fifth International Symposium on
  • Conference_Location
    Pasadena, CA, USA
  • Print_ISBN
    0-8186-7079-7
  • Type

    conf

  • DOI
    10.1109/FTCS.1995.466991
  • Filename
    466991