Title :
The GigaFitter: A next generation track fitter to enhance online tracking performances at CDF
Author :
Amerio, S. ; Annovi, A. ; Bettini, M. ; Bucciantonio, M. ; Catastini, P. ; Crescioli, F. ; Orso, M. Dell ; Giannetti, P. ; Lucchesi, D. ; Nicoletto, M. ; Piendibene, M. ; Volpi, G.
Author_Institution :
INFN Padova, Univ. of Padova, Padova, Italy
fDate :
Oct. 24 2009-Nov. 1 2009
Abstract :
The Silicon-Vertex-Trigger (SVT) is a processor developed at CDF experiment to perform online fast and precise track reconstruction. SVT is made of two pipelined processors: the Associative Memory finds low precision tracks looking for coincidences between hits from the tracking detectors and track candidates (roads) stored in memory; the Track Fitter refines the track quality whith high precision fits. The GigaFitter is a next generation track fitter, developed to reduce the degradation of the SVT efficiency due to the increasing instantaneous luminosity. It reduces the track parameter reconstruction to a few clock cycles and can perform many fits in parallel, thus allowing high resolution tracking at very high rate. The core of the GigaFitter is implemented in a modern Xilinx Virtex-5 FPGA chip, rich of powerful DSP arrays. With respect to the current Track Fitter, the GigaFitter is faster and provided of much more memory to store a greater number of roads to be used in the fit; this results in an increased SVT efficiency as more track candidates can be reconstructed. The GigaFitter has been installed in parasitic mode at CDF and has been tested against the current Track Fitter. We will describe the GigaFitter architecture, the parasitic installation at CDF and the performances with respect to the current system.
Keywords :
field programmable gate arrays; high energy physics instrumentation computing; position sensitive particle detectors; program processors; semiconductor counters; CDF; DSP arrays; GigaFitter; Xilinx Virtex-5 FPGA chip; associative memory; clock cycles; instantaneous luminosity; online tracking performances; parasitic installation; precise track reconstruction; processor; silicon-vertex-trigger; track fitter; track parameter reconstruction; Detectors; Digital signal processing chips; Field programmable gate arrays; Hardware; Mesons; Nuclear and plasma sciences; Pipelines; Roads; Silicon; Testing;
Conference_Titel :
Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4244-3961-4
Electronic_ISBN :
1095-7863
DOI :
10.1109/NSSMIC.2009.5402410