Cluster growth revisited: fast, mixed-signal placement of blocks and gates

A method for placement of circuit elements using fast clustering is presented. The method uses bi-level cost functions and efficient storage structures to keep the search space reasonable, even with very large layouts. These cost functions allow for not just general path-delay minimization and aspect ratio maintenance, but also mixed signal and diagonalized routing criteria. Thermal profiling, noise thresholding, device matching, and bounding box ratios can all be constrained in the placement. This method expands and builds upon the classical cluster growth algorithm; the true advantage of this method lies in its ability to scale up to problems too large to be considered using traditional, heuristic algorithms, and without assumptions about layout styles.