Title :
Short-flow test chip utilizing fast testing for defect density monitoring in 45nm
Author :
Karthikeyan, Muthu ; Cote, William ; Medina, Louis ; Shiling, Ernesto ; Gasasira, Arthur ; Henning, Amy ; Ferrante, William ; Craig, Mark ; Merbeth, Thomas
Author_Institution :
IBM Syst. & Technol. Group, Hopewell Junction, NY
Abstract :
A comprehensive 45 nm short-flow test chip was designed and is currently used to improve defect-limited yield. In a novel development to reduce test time, the DC test structures are tested in parallel mode on a functional test platform, resulting in a 5x reduction in test time over conventional parametric testing. The large critical area enables accurate measurement of defect densities down to the ppb-level, while the reduced cycle time of this short-flow test chip makes it an excellent routine defect monitor as well as a test vehicle for evaluating process changes.
Keywords :
integrated circuit testing; DC test structures; defect density monitoring; defect-limited yield; parametric testing; reduced cycle time; short-flow test chip; test vehicle; Microelectronics; Monitoring; Testing; Defect-limited yield; Parallel-test; Process characterization; Yield enhancement;
Conference_Titel :
Microelectronic Test Structures, 2008. ICMTS 2008. IEEE International Conference on
Conference_Location :
Edinburgh
Print_ISBN :
978-1-4244-1800-8
Electronic_ISBN :
978-1-4244-1801-5
DOI :
10.1109/ICMTS.2008.4509314