Spacing impact on MOSFET mismatch

Many test structures embedded in various technologies were measured to study the spacing impact on MOSFET mismatch. This impact is showed to highly depend on technology, device family, device type and bias conditions. The study of spatial correlation allows to properly model spacing impact on mismatch: this analysis -in this paper focused on MOSFETs- may be extended to any device. Finally, a worst case model that only requires standard matched pairs at minimum spacing is proposed to provide designers the maximum matching degradation that may affect spaced devices.