DocumentCode
3342097
Title
A novel graph algorithm for circuit recognition
Author
Huang, Kai-Ti ; Overhauser, David
Author_Institution
Dept. of Electr. Eng., Duke Univ., Durham, NC, USA
Volume
3
fYear
1995
fDate
30 Apr-3 May 1995
Firstpage
1695
Abstract
This paper presents novel subcircuit recognition and verification algorithms based on a new technique for circuit graph coding. This coding uniquely identifies each subcircuit and is ideal for applications requiring circuit graph isomorphism in the presence of parasitics. These algorithms use a new circuit graph and graph isomorphism techniques to generate a unique code for each subcircuit, which has led to an improved circuit recognition algorithm
Keywords
VLSI; circuit analysis computing; encoding; graph theory; integrated circuit design; VLSI design; circuit graph coding; circuit graph isomorphism; circuit recognition; graph algorithm; graph isomorphism; parasitics; subcircuit recognition algorithm; subcircuit verification algorithms; Analog circuits; BiCMOS integrated circuits; Circuit simulation; Circuit synthesis; Circuit testing; Large-scale systems; Logic circuits; Signal design; Tree graphs; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-7803-2570-2
Type
conf
DOI
10.1109/ISCAS.1995.523738
Filename
523738
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