90 dB, 90 MHz, 30 mW OTA with the gain-enhancement implemented by one- and two-stage amplifiers

Author

Helfenstein, Markus ; Huang, Qiuting ; Moschytz, George S.

Author_Institution

Inst. for Signal & Inf. Process., Swiss Federal Inst. of Technol., Zurich, Switzerland

Volume

3

fYear

1995

fDate

30 Apr-3 May 1995

Firstpage

1732

Abstract

The design of simple gain-enhancement configurations for cascode transistors is presented. Applying one- or two-stage differential amplifiers, or an improved regulated cascode configuration in the feedback loop of a cascode, allows high speed and high gain super-transistors at low voltage to he designed. These concepts were implemented in a symmetrical OTA resulting in a measured 90 dB, 90 MHz, 30 mW amplifier performance for a 14 pF load. Settling measurements to 0.1% error for a unity-gain configuration are presented

Keywords

CMOS analogue integrated circuits; differential amplifiers; feedback amplifiers; integrated circuit design; integrated circuit measurement; operational amplifiers; 14 pF; 30 mW; 90 MHz; 90 dB; SACMOS process; cascode transistors; differential amplifiers; feedback loop; gain enhancement; high gain super-transistors; one-stage amplifiers; operational transconductance amplifiers; regulated cascode configuration; settling measurements; symmetrical OTA; two-stage amplifiers; unity-gain configuration; Analog circuits; CMOS technology; Dynamic range; Energy consumption; Feedback loop; Information processing; Low voltage; Signal design; Signal processing; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-2570-2

Type

conf

DOI

10.1109/ISCAS.1995.523747

Filename

523747