Title :
Scan chain fault diagnosis with fault dictionaries
Author :
Edirisooriya, G. ; Edirisooriya, Geetani
Author_Institution :
Motorola Inc., Tempe, AZ, USA
fDate :
30 Apr-3 May 1995
Abstract :
Scan based diagnostic schemes implicitly assume that the scan path itself is fault-free. However, the logic circuitry associated with the scan chain can occupy a considerable area of the chip and hence should not be neglected during fault diagnosis. In this work we propose a simple extension to the scan chain to diagnose faults in scan chains based upon fault dictionaries
Keywords :
combinational circuits; fault diagnosis; integrated circuit testing; integrated logic circuits; logic testing; fault dictionaries; logic circuitry; scan chain fault diagnosis; Circuit faults; Circuit testing; Dictionaries; Fault diagnosis; Fault location; Flip-flops; Latches; Logic circuits; Logic design; Logic testing;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.523792