Behavior of self-checking checkers for 1-out-of-3 codes based on pass-transistor logic

VLSI circuit implementation using transmission gates allows improvement of both circuit density and performances, without increasing power dissipation. Moreover, in self-checking structures, it allows detection of a larger class of faults than fully CMOS structures. This is true in particular for 1-out-of-3 codes, for which no gate level implementation of a self-checking checker (with respect to stuck-at faults) has been found yet. In this paper a self-checking checker for 1-out-of-3 codes obtained through a formalized synthesis procedure is presented and compared with other checkers to verify its performances