Roundoff noise analysis of state-space digital filters implemented on floating-point digital signal processors

An expression is obtained for the floating-point roundoff noise variance at the output of a general Nth-order state-space digital filter. This expression is then simplified for a filter implemented on a floating-point digital signal processor. Since these processors carry extended precision within registers, it is found that the floating-point roundoff noise gain is identical to the fixed-point roundoff noise gain used extensively in the past for designing optimal and near-optimal fixed-point digital filters. Therefore, previous work to optimize fixed-point realizations is directly applicable to the floating-point realizations