Title :
A mismatch free CMOS dynamic voltage comparator
Author :
Azadet, K. ; Dickinson, A.G. ; Inglis, D.A.
Author_Institution :
AT&T Bell Labs., Holmdel, NJ, USA
fDate :
30 Apr-3 May 1995
Abstract :
This paper describes an analog voltage comparator. It uses a current-mode approach for the storage of one input and reuse of the same transistors for both analog inputs, thus avoiding the problem of transistor mismatch encountered in differential structures. The circuit has been fabricated in a digital 0.9 μm CMOS process and was tested with a power supply of 1.5 V. The measured offset is 1 mV
Keywords :
CMOS analogue integrated circuits; comparators (circuits); 0.9 micron; 1.5 V; CMOS process; analog voltage comparator; current-mode approach; dynamic voltage comparator; offset measurement; power supply; transistor-mismatch-free design; CMOS process; Capacitors; Circuit testing; Clocks; Diodes; Power supplies; Signal design; Switches; Variable structure systems; Voltage;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.523843
