• DocumentCode
    3344155
  • Title

    BDD FTEST: fast, backtrack-free test generator based on binary decision diagram representation

  • Author

    Bechir, Ayari ; Kaminska, Bozena

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
  • Volume
    3
  • fYear
    1995
  • fDate
    30 Apr-3 May 1995
  • Firstpage
    2132
  • Abstract
    This paper presents a new approach for generating test vectors for combinational circuits. In the approach presented here, the automatic test generator, called BDD FTEST, uses an algebraic method to find a set of test vectors for single stuck lines. For all the circuits analyzed, the algorithm is faster than previously algebraic methods. Experimental results demonstrate that, for most circuits, our algorithm can generate test vectors for all faults in a very short time, particularly for large circuits like the c7552
  • Keywords
    automatic testing; combinational circuits; fault diagnosis; integrated circuit testing; logic testing; BDD FTEST; algebraic method; backtrack-free test generator; binary decision diagram representation; combinational circuits; single stuck lines; test vectors; Binary decision diagrams; Boolean functions; Circuit faults; Circuit testing; Computational modeling; Data structures; Input variables; Observability; Tsunami;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    0-7803-2570-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.1995.523847
  • Filename
    523847