DocumentCode :
3345564
Title :
Systematic formal verification of interpreters
Author :
Cyrluk, David ; Rushby, John ; Srivas, Mandayam
Author_Institution :
Comput. Sci. Lab., SRI Int., Menlo Park, CA, USA
fYear :
1997
fDate :
12-14 Nov. 1997
Firstpage :
140
Lastpage :
149
Abstract :
Formal methods have gained acceptance in the hardware field through a pragmatic approach that has succeeded in providing systematic, scalable, highly automated, and cost effective treatments for certain stereotypical problems of practical importance. By identifying stereotypical problems, the effort required to develop effective formal methods has been amortized over many applications. We suggest that formal methods can achieve similar industrial success in selected software applications by following the same principles. As an illustration, we examine approaches to the stereotypical problem of interpreter correctness in the presence of timing differences between the specification and implementation interpreters. In hardware, this corresponds to the problem of verifying microprogrammed, pipelined, or superscalar processors, but it has wider applications to any system-hardware or software-that can be considered as an interpreter.
Keywords :
formal specification; formal verification; program interpreters; program verification; cost effective treatments; formal methods; implementation interpreters; interpreter correctness; stereotypical problems; superscalar processors; systematic formal verification; timing differences; Boolean functions; Computer bugs; Computer industry; Contracts; Data structures; Design automation; Formal verification; Hardware; Logic; State-space methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Formal Engineering Methods., 1997. Proceedings., First IEEE International Conference on
Conference_Location :
Hiroshima, Japan
Print_ISBN :
0-8186-8002-4
Type :
conf
DOI :
10.1109/ICFEM.1997.630421
Filename :
630421
Link To Document :
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