Title :
TOT02, a time-over-threshold based readout chip in 180 nm CMOS process for long silicon strip detectors
Author :
Kasinski, K. ; Szczygiel, R. ; Grybos, P.
Author_Institution :
Dept. of Meas. & Instrum., AGH Univ. of Sci. & Technol., Kraków, Poland
Abstract :
We report on the design and measurements of multichannel ASIC named TOT02, dedicated for the readout of silicon long strip detectors of the Silicon Tracking System (STS) in the CBM experiment at FAIR, GSI. This Integrated Circuit adapts the time-over-threshold (ToT) method for detectors with large capacitance (30pF). The prototype chip has 16 channels comprising of a charge sensitive amplifier with a constant current discharge and a discriminator with 6-bit trimming DAC and it is supplied with digital back-end. The paper presents details of architecture, ENC estimation methodology for ToT systems and test setup together with measurement and simulation results.
Keywords :
amplifiers; application specific integrated circuits; digital-analogue conversion; nuclear electronics; readout electronics; semiconductor counters; CBM experiment; CMOS process; FAIR; GSI; STS; Silicon Tracking System; TOT02; charge sensitive amplifier; constant current discharge; discriminator; integrated circuit; large capacitance detectors; long silicon strip detectors; multichannel ASIC design; time over threshold based readout chip; trimming DAC; Detectors; Latches; Switches;
Conference_Titel :
Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2011 IEEE
Conference_Location :
Valencia
Print_ISBN :
978-1-4673-0118-3
DOI :
10.1109/NSSMIC.2011.6153981