Design of a FFT/IFFT module as an IP core suitable for embedded systems

In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP core. The main objective is to design a configurable optimized core that can be integrated as a standard peripheral of a microprocessor system. Thus, three different methodologies have been compared: VHDL coding, System-level tools at RT level, and System-level tools at macroblock level; in order to propose a general methodology that facilitates the design process as well as allows designers to maintain total control over the module internal architecture.