• DocumentCode
    3346936
  • Title

    Assembly and Reliability Assessment of Lithography-Based Wafer-Level Compliant Chip-to-Substrate Interconnects

  • Author

    Kacker, Karan ; Lo, George ; Sitaraman, Suresh K.

  • fYear
    2005
  • fDate
    May 31 2005-June 3 2005
  • Firstpage
    545
  • Lastpage
    550
  • Keywords
    Assembly; Computational modeling; Dielectric substrates; Environmentally friendly manufacturing techniques; Fabrication; Lead; Lithography; Packaging; Stress; Thermal force;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2005. Proceedings. 55th
  • Conference_Location
    Lake Buena Vista, FL
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-8907-7
  • Type

    conf

  • DOI
    10.1109/ECTC.2005.1441320
  • Filename
    1441320
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3346936