DocumentCode :
334713
Title :
Number representations for reducing data bus power dissipation
Author :
Sacha, John R. ; Irwin, Mary Jane
Author_Institution :
Appl. Res. Lab., Pennsylvania State Univ., University Park, PA, USA
Volume :
1
fYear :
1998
fDate :
1-4 Nov. 1998
Firstpage :
213
Abstract :
In the usual two´s complement representation of data, sign extensions in the higher-order bit positions can lead to a great deal of data bus switching activity. It is shown that the use of signed-digit representations can mitigate this effect. A negabinary representation (equivalent to a nonredundant sign-digit formulation) reduced data bus switching activity to a degree comparable to that provided by the better-known sign-magnitude notation.
Keywords :
CMOS digital integrated circuits; VLSI; digital arithmetic; system buses; CMOS circuits; VLSI; data bus power dissipation reduction; data bus switching; higher-order bit positions; negabinary representation; nonredundant sign-digit formulation; number representations; sign extensions; sign-magnitude notation; signed-digit representations; two´s complement representation; Capacitance; Circuits; Computer science; Costs; Educational institutions; Encoding; Laboratories; Power dissipation; Power engineering and energy; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
ISSN :
1058-6393
Print_ISBN :
0-7803-5148-7
Type :
conf
DOI :
10.1109/ACSSC.1998.750856
Filename :
750856
Link To Document :
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