Implementation of a low-power accumulator for filter applications

Author

Balaram, Arjun ; Jell, Friedrich

Author_Institution

SIEMENS Microelectron. Asia Pacific Pte Ltd., Singapore

Volume

1

fYear

1998

fDate

1-4 Nov. 1998

Firstpage

223

Abstract

A highly power-optimised accumulator is developed which can be used for integration circuits in comb filters. Comb filters have operands of high bitwidth and the accumulators used need huge sign extension at the input. The power consumed by the integration circuits is mainly due to the switching of the input data. By designing the accumulators without sign extension at the input, a power reduction of up to 60% is obtained (depending on the input data pattern). Implementations of this optimised accumulator in a 1-channel, 2- and 12-bit input, 25-bit output, 10 MHz comb filter is illustrated in this paper.

Keywords

comb filters; digital arithmetic; digital filters; integrating circuits; 10 MHz; 12 bit; 2 bit; 25 bit; comb filters; filter applications; high bitwidth; input data pattern; input data switching; integration circuits; low-power accumulator; operands; optimised accumulator; power consumption; power reduction; power-optimised accumulator; sign extension; Adders; Circuits; Clocks; Energy consumption; Frequency; Microelectronics; Power filters; Process design; Registers; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on

Conference_Location

Pacific Grove, CA, USA

ISSN

1058-6393

Print_ISBN

0-7803-5148-7

Type

conf

DOI

10.1109/ACSSC.1998.750858

Filename

750858