DocumentCode :
3348108
Title :
On dynamic speculative thread partitioning and the MEM-slicing algorithm
Author :
Codrescu, Lucian ; Wills, D. Scott
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
1999
fDate :
1999
Firstpage :
40
Lastpage :
46
Abstract :
A dynamic speculative multithreaded processor automatically extracts thread level parallelism from sequential binary applications without software support. The hardware is responsible for partitioning the program into threads and managing inter-thread dependencies. Current published dynamic thread partitioning algorithms work by detecting loops, procedures, or partitioning at fixed intervals. Research has thus far examined these algorithms in isolation from one another. This paper makes two contributions. First, it quantitatively compares different dynamic partitioning algorithms in the context of a fixed architecture. The architecture is a single-chip shared memory multiprocessor enhanced to allow thread and value speculation. Second, this paper presents a new dynamic partitioning algorithm called MEM-slicing. Insights into the development and operation of this algorithm are presented. The technique is particularly suited to irregular, non-numeric programs, and greatly outperforms other algorithms in this domain. MEM-slicing is shown to be an important tool to enable the automatic parallelization of irregular binary applications. Over SPECint95, an average speedup of 3.4 is achieved on 8 processors
Keywords :
multi-threading; parallel algorithms; parallel architectures; shared memory systems; MEM-slicing algorithm; SPECint95; automatic parallelization; automatic thread level parallelism extraction; average speedup; dynamic speculative multithreaded processor; dynamic speculative thread partitioning; dynamic thread partitioning algorithms; fixed architecture; inter-thread dependency management; irregular non-numeric programs; program partitioning; sequential binary applications; single-chip shared memory multiprocessor; thread speculation; value speculation; Application software; Automatic control; Concurrent computing; Data mining; Heuristic algorithms; Multithreading; Parallel processing; Partitioning algorithms; Read only memory; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures and Compilation Techniques, 1999. Proceedings. 1999 International Conference on
Conference_Location :
Newport Beach, CA
ISSN :
1089-795X
Print_ISBN :
0-7695-0425-6
Type :
conf
DOI :
10.1109/PACT.1999.807404
Filename :
807404
Link To Document :
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